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Yehuda Naveh (IBM), Constraint Satisfaction for Random Stimuli Generation

Automatic random stimuli generation plays a central role in the functional verification of complex hardware design. Modern stimuli generators use constraint satisfaction techniques to enforce the validity of the stimuli and to bias it towards prone-to-bugs areas. I will review the unique aspects of applying constraint programming (CP) to this domain, present state-of-the-art methods, show some problems and solutions encountered in the verification of IBM's high-end processors and systems, and discuss open issues.